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Chun-Lin Liu – Home


Chun-Lin Liu (劉俊麟)
Ph.D. Candidate,
Digital Signal Processing Group,
Department of Electrical Engineering,
California Institute of Technology.

I am a PhD candidate in the Department of Electrical Engineering at the California Institute of Technology (Caltech), Pasadena, CA, under the advice of Prof. P. P. Vaidyanathan. I received the B.S. and M.S. degrees in electrical engineering and communication engineering from National Taiwan University (NTU), Taipei, Taiwan, in 2010 and 2012, respectively.

My research interests are in sparse array signal processing, sparse array design, and statistical signal processing. I received the Best Student Paper Awards at the 41st IEEE International Conference on Acoustics, Speech and Signal Processing, 2016, Shanghai, China, and the 9th IEEE Sensor Array and Multichannel Signal Processing Workshop, 2016, Rio de Janeiro, Brazil. I was also one of the recipients of the Student Paper Award at the 50th Asilomar Conference on Signals, Systems, and Computers, 2016, Pacific Grove, CA.


  • April 2018: Best Student Paper Award at IEEE ICASSP 2018, Calgary, Alberta, Canada, for the paper titled ‘‘Robustness of Coarrays of Sparse Arrays to Sensor Failures.’’

  • March 2018: New paper titled ‘‘Comparison of Sparse Arrays From Viewpoint of Coarray Stability and Robustness’’ was submitted to IEEE SAM 2018.

  • January 2018: New paper titled ‘‘Robustness of Coarrays of Sparse Arrays to Sensor Failures’’ was accepted by IEEE ICASSP 2018.

  • September 2017: Seminars at

    • National Taiwan University (September 4)

    • Academia Sinica (September 5)

    • Chunghwa Telecom Laboratories (September 12)

    • National Chiao Tung University (September 13)


  • Address: 1200 E. California Blvd, Mail Code: EE 136-93, Pasadena, CA 91125

  • Office: Moore 110

  • E-mail: